HKMG Applications

Gate First Process

The gate first approach is similar to the process flow for existing SiON dielectric and polysilicon gate stacks. The difference is that additional films deposited to achieve the high-k dielectric properties and the necessary work function for the transistors.  The high-k hafnium-based dielectric and metal electrode material are deposited (instead of traditional materials), forming the gate before the source and drain ion implantation and anneal.

One of the challenges of a gate first approach is finding the right set of materials and work functions such that the n and p transistor types survive the high temperature annealing needed.  The transistor stack must also be compatible with strain techniques.  Proponents of gate first claim it is a simpler, cheaper and scalable for future nodes.

The table below shows a simplified outline of the gate first process flow, its challenges and the advantages VeraFlex II provides. Click here for information on the replacement gate process.

Basic Process Steps   Challenges VeraFlex II Advantages
  • Deposit HK
  • Deposit WF1
  • Deposit  MG1
HKMG GF1
  • High-k film is complex
  • WF dopant film thickness is critical < 10A
  • MG film is very sensitive to oxygen
  • Monitor and control the ultra-thin thickness of the high-k, WF and metal gate film
  • Control the key composition features:  HK/SiO2, Ti/N, Al/O, La/O, Ti/O
  • Qual. for HKMG process chambers
  • Pattern MG1, WF1
  • Deposit WF2
  • Deposit MG2
HKMG GF2
  • WF dopant film thickness is critical < 10A
  • MG film is very sensitive to oxygen
  • Monitor and control the ultra-thin thickness of the WF and metal gate film
  • Control the key composition features:  Ti/N, Al/O, La/O, Ti/O
  • Qual. for HKMG process chambers
  • Deposit and CMP polysilicon
  • Pattern and etch gates
HKMG GF3
  • Most critical litho step in the line – immersion litho
  • Etch selectivity’s are challenging
  • Residual WF metal removal is critical
  • Measure and control residual etch properties:  polymers, SiOx, La removal, Al removal
  • Qual. for HKMG process chambers
  • Litho for Implant
  • Implant dopant into source / drain
  • High T anneal to activate
  • Deposit PMD, etch contacts, form silicides
  • High T anneal
HKMG GF4
  • High T anneals challenging for HK films, WF films
  • Plasma doping line control:
    surface Boron, Arsenic
  • Qual. for silicide process chambers

MG = metal gate | WF = work function metal | HK = high-K

Contact ReVera to discuss your specific high-k challenges, and the advantages of the VeraFlex II production metrology system to your production processes.